An insulated-gate field-effect transistor (IGFET), such as a metal-oxide semiconductor field-effect transistor (MOSFET), uses a gate to control an underlying surface channel joining a source and a drain. The channel, source and drain are located in a semiconductor substrate, with the source and drain being doped oppositely to the substrate. The gate is separated from the semiconductor substrate by a insulating layer such as a dielectric layer. The operation of the IGFET involves application of an input voltage to the gate, which sets up a transverse electric field in the channel in order to modulate the longitudinal conductance of the channel.
In typical IGFET processing, the source and drain are formed by introducing dopants of second conductivity type (P or N) into a semiconductor substrate of first conductivity type (N or P) using a patterned gate as a mask. This self-aligning procedure tends to improve packing density and reduce parasitic overlap capacitances between the gate and the source and drain. Currently, arsenic is the dopant most commonly used in forming an NMOSFET and boron is the dopant most commonly used in forming a PMOSFET
Complimentary MOS (CMOS) is a MOS circuit formed with both N-channel and P-channel transistors. CMOS has become the standard circuit for many applications. It is the CMOS circuit that has made possible digital watches and hand-held calculators. It allows circuits on one chip that would require several chips using N-channel and P-channel only circuits. CMOS circuits also use lower amounts of power than comparable circuits.
CMOS structures are typically formed by first fabricating an N-channel MOS transistor in a deep P-type well formed in the wafer surface. After N-channel transistor formation, a P-channel transistor is fabricated. The transistor structures are polysilicon gate or other advanced structures. CMOS processing uses the most advanced techniques since smaller, more densely packed, and higher-quality components all increase the advantages inherent in the CMOS design.
There are problems with the manufacture of CMOS structures. These problems alter design of a CMOS device. One of the most difficult items to consider in the design of CMOS transistors is the application of heat cycles and their effect on already present dopant species. Dopants react differently and uniquely to thermal cycles and therefore great care must be taken when designing transistors. As mentioned above, boron is used as the P-type dopant for p-channel gates and source/drain regions. Boron has been used to form the PMOSFETS designed using CMOS as well as chips which use only PMOSFETS. The dopants are introduced into a substrate using ion implantation. Silicon is the substrate that is currently used in making most all of MOS type transistors. Silicon substrates are also used in CMOS transistor designs.
Ion implantation of dopant species is used throughout the process in the fabrication of CMOS transistors. Implants are used to selectively dope regions to form conductive pathways in the silicon wafer. Ion Implantation is a good method for introducing dopants because during manufacture, the dose and energy at which the species are introduced can be controlled very accurately. One drawback of ion implantation is the creation of "defects" in the silicon lattice which have adverse effects on transistor fabrication at later steps. One "defect" is the creation of amorphous silicon which must be annealed to return it to its crystalline state. This anneal is an added thermal cycle which must be taken into account when designing both n-channel and p-channel transistors. Not only does the anneal cycle take away from the thermal budget, it also provides the heat for already present species and the just implanted species to diffuse. The diffusion is enhanced by the fact the first few hundred angstroms of the silicon surface is amorphous, leading to an accelerated and uncontrolled rate of dopant diffusion.
Boron can be activated with a much lower heat treatment than arsenic which is often used for n-channel gate and source/drain doping. Not only does boron diffuse readily through amorphous silicon, it segregates into and through the oxide layers used as insulators between the gate and the channel in a MOS type transistor. Boron does not move as readily in repaired or annealed silicon. Thermal cycles are an absolutely essential part of transistor fabrication and design because they activate implanted dopant species and they recrystallize the damaged silicon surface. Currently, boron will diffuse more readily if subjected to the same thermal cycles as arsenic.
As shown above, there is a need for a process which can be used to manufacture PMOSFETS in such a way to prevent or substantially hinder the movement through silicon or into the gate oxides or trench isolation areas to allow for more flexibility in the design of CMOS devices. There is also a need to control the diffusion of boron to control electrical parametrics on sub-micron devices. Without some method to control the diffusion of boron, the performance of the CMOS device may be compromised. Furthermore, there is a need to introduce this control without adding separate heat treat process steps so as to maintain the thermal budget associated with the CMOS design.